Module `Reg_with_debug_info`

Registers equipped with information used for generating debugging information.

module Debug_info : sig ... end

type t

type reg_with_debug_info = Reg_with_debug_info.t

val create : 
  reg:Reg.t ->
  holds_value_of:Backend_var.t ->
  part_of_value:int ->
  num_parts_of_value:int ->
  which_parameter:int option ->
  provenance:Backend_var.Provenance.t option ->
  Reg_with_debug_info.t

val create_with_debug_info : 
  reg:Reg.t ->
  debug_info:Reg_with_debug_info.Debug_info.t option ->
  Reg_with_debug_info.t

val create_without_debug_info : reg:Reg.t -> Reg_with_debug_info.t

val create_copying_debug_info : 
  reg:Reg.t ->
  debug_info_from:Reg_with_debug_info.t ->
  Reg_with_debug_info.t

val reg : Reg_with_debug_info.t -> Reg.t

val location : Reg_with_debug_info.t -> Reg.location

val debug_info : 
  Reg_with_debug_info.t ->
  Reg_with_debug_info.Debug_info.t option

val at_same_location : Reg_with_debug_info.t -> Reg.t -> bool

at_same_location t reg holds iff the register t corresponds to the same (physical or pseudoregister) location as the register reg, which is not equipped with debugging information.

val holds_pointer : Reg_with_debug_info.t -> bool

val holds_non_pointer : Reg_with_debug_info.t -> bool

val assigned_to_stack : Reg_with_debug_info.t -> bool

assigned_to_stack t holds iff the location of t is a hard stack slot. (This returns false for Domainstate slots.)

val clear_debug_info : Reg_with_debug_info.t -> Reg_with_debug_info.t

module Set_distinguishing_names_and_locations : sig ... end

module Map_distinguishing_names_and_locations : 
  Stdlib.Map.S with type key = Reg_with_debug_info.t

val print : 
  print_reg:(Stdlib.Format.formatter -> Reg.t -> unit) ->
  Stdlib.Format.formatter ->
  Reg_with_debug_info.t ->
  unit

Module Reg_with_debug_info

Module `Reg_with_debug_info`